ECE 581: Advanced Analog IC Design

Handouts

	Date	Topic	Handout
1	08/27/2018	Introduction	HO1-Introduction(Video-01 Start from 24m), HO2-Single-Stage-Amplifiers(Video-02,Video-03)
2	08/29/2018	Gm over Id	HO3-Gm-over-Id-Design-Methodology(Video-04)
3	09/05/2018	Differential Amplifiers I	HO4-Diff-Amps-I
4	09/19/2018	Differential Amplifiers II	HO5-Diff-Amps-II_updated
5	09/24/2018	Gain boosting Amps	HO5-Gain-boosting
6	09/26/2018	Multi Stage Amps-I	HO6-Multi-Stage-Amps-I
7	10/03/2018	Multi Stage Amps-II	HO6-Multi-Stage-Amps-II (Cascode compensation)
8	10/14/2018	Transient response	HO7-transient-response
9	10/15/2018	Design-examples	HO8-Design-examples (HO8-cas_comp_design, HO8-cascode_comp_opt, HO8-miller_comp_opt)
10	10/22/2018	Comparators	HO9-Comparators
11	10/26/2018	Current-references	H1O-Current-references
12	10/29/2018	Voltage-references	H1O-Voltage-references
13	10/31/2018	Pipelined-ADCs	H11-Pipelined-ADCs
14	11/24/2018	SC-Circuits	HO12-SC-Circuits
		CAD Tools Demo	CADInfo (Video-CAD)

D. B. Ribner and M. A. Copeland, “Design techniques for cascoded CMOS op amps with improved PSRR and common-mode input range,” IEEE Journal of Solid-State Circuits, vol. 19, no. 6, pp. 919-925, Dec. 1984.
T. Cho and P. Gray, “A 10 b, 20 Msamples, 35 mW pipeline AD converter,” IEEE Journal of Solid-State Circuits, Vol. 30, no. 3, pp. 166-172, March 1995.
S. Lewis et al, “A 10-b 20-Msample/s analog-to-digital converter,” IEEE Journal of Solid-State Circuits, Vol. 27, no. 3, pp. 351-358, March 1992.
F. Silveira and D. Flandre,“Operational amplifier power optimization for a given total (slewing plus linear) settling time,” Proc. Symp. on Integrated Circuits and Systems Design, 2002. pp.247-253, 2002.
K. Bult and G. Geelen, “A fast-settling CMOS op amp for SC circuits with 90-dB DC gain,” IEEE Journal of Solid-State Circuits, Vol. 25, no. 6, pp. 1379-1384. December 1990.
Describes design of a gain boosted cascode amplifier.
M. Tian et al, “Striving for small-signal stability,” IEEE Circuits and Devices. Vol. 17, no. 1, pp. 31-41. January 2001.
Describes algorithm used for stability analysis (stb) in spectre.
Pollissard-Quatremere et al, “A modified gm/ID design methodology for deeply scaled CMOS technologies,” Analog Integrated Circuits and Signal Processing. Vol. 78, no. 3, pp. 771-784. March 2014.