ECE 462 Resources

Spring 2018

Important Dates

Exam 1: Thursday, March 1st 2018(TENTATIVE), 11am-12:20pm, In Class
Exam 2: Tuesday, April 10th 2018(TENTATIVE), 11am-12:20pm, In Class
Final Exam: TBD


Hachtel and Somenzi, Logic Synthesis and Verification Algorithms
Text Book from SpringerLink (needs NetID and Password)

Supplemental Textbooks

E. J. McCluskey, Logic Design Principles
Randy H. Katz, Contemporary Logic Design
Weste and Eshraighan, Principles of CMOS VLSI Design
Giovanni De Micheli, Synthesis and Optimization of Digital Circuits
Srinivas Devadas, Logic Synthesis

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