ECE 342: Electronic Circuits

Date            Topic             Homework Schedule Reading
1 01/17/18 KCL, KVL, Thevenin and Norton Theorems Notes/Subtitution Theorem/notes-SP-2018
2 01/19/18 Two-port networks HW 1 assigned Notes/notes-SP-2018
3 01/22/18 Large & Small-signal models - General concept Notes/4.2-4.3/notes-SP-2018
4 01/24/18 Diode device structure, large-signal model & DC analysis Notes/4.2-4.3/notes-SP-2018
5 01/26/18 Diode small-signal models and AC analysis HW 1 due. HW 2 assigned Notes/4.2-4.3/notes-SP-2018
6 01/29/18 MOS technology & terminal I-V behavior Notes/5.1-5.3/Updated 02/12/18:notes-SP-2018
7 01/31/18 DC analysis of circuits with MOSFETs Notes/5.1-5.3/notes-SP-2018
8 02/02/18 DC analysis, continued HW 2 due. HW 3 assigned. Notes/5.1-5.3
9 02/05/18 Small-signal model of MOSFET Notes/7.1-7.3/notes-SP-2018 /notes-SP-2018
10 02/07/18 CS amplifier - DC behavior Notes/7.1-7.3/notes-SP-2018
11 02/09/18 AC (linear) model of CS amp HW 3 due. HW 4 assigned. Notes/7.3.3,7.5.1
12 02/12/18 Voltage gain of CS amp (continued from previous class) Notes/7.3.3,7.5.1
13 02/14/18 Terminal impedances of MOSFETs (low-freq.). Input and output resistance of CS amp. Notes
14 02/16/18 Using Gm, Rin and Rout to find gain of CS amp (“alternative method”)/Alternate Gain Calculation Method Examples HW 4 due. HW 5 assigned. Notes/notes-SP-2018
15 02/19/18 Analysis of CS amp with source degeneration Notes/7.3.5-6/notes-SP-2018
16 02/21/18 Analysis of CG amplifier Notes/7.3.5-6/notes-SP-2018
17 02/23/18 Analysis of CD amplifier HW 5 due. Notes/7.3.5-6/notes-SP-2018
18 02/26/18 BJT regions of operation. I-V equations for forward active region. Notes/6.1-6.2
19 02/28/18 MIDTERM 1 (7-8 PM)
20 03/02/18 DC analysis of circuits with BJTs. HW 6 assigned. Notes/6.3
21 03/05/18 BJT small-signal model. Voltage gain of CE stage. Notes/7.2.2
22 03/07/18 BJT terminal impedances Notes
22 03/09/18 EOH (no class) HW 6 due. HW 7 assigned.
23 03/12/18 Emitter degenerated CE amp (Av, Rin, Rout) Notes/7.3.4
24 03/14/18 CB and CC amps Notes
Spring Break(3172018 - 3252018)
25 03/16/18 Frequency response. Transfer functions. HW 7 due. HW 8 assigned. Notes/Appendix F
26 03/26/18 Complex numbers. Bode plots. Notes/Appendix F
27 03/28/18 Transistor intrinsic capacitances. Notes
28 03/30/18 Procedure to derive the approximate transfer function directly from the circuit schematic. Miller's Theorem. Open circuit time constants. HW 8 due. HW 9 assigned. Notes
29 04/02/18 Frequency response of CE and CS amps Notes
30 04/04/18 Frequency response of CB/CG amps. Frequency response of cascaded CS/CE amps. Notes
31 04/06/18 Introduction to feedback. Properties of negative feedback. HW 9 due. Notes
32 04/09/18 Previous topic, continued. Brief introduction to positive feedback. Notes
32 04/11/18 MIDTERM 2 (7-8 PM)
33 04/13/18 Stability of systems with negative feedback. HW 10 assigned. Notes
33 04/16/18 Previous topic, continued (includes loop gain and phase margin). Notes
34 04/18/18 Examples: feedback and stability analysis Notes
35 04/20/18 Introduction to CMOS logic. RC delay model for CMOS inverter. HW 10 due. HW 11 assigned. Notes/14.1,14.5
36 04/23/18 Transistor sizing Notes/14.1,14.5
37 04/25/18 PDN and PUN design for complementary static logic gates Notes/14.1,14.5
38 04/27/18 Transistor sizing in combinational logic gates Notes/14.1,14.5
39 04/30/18
40 05/02/18 Review HW 11 due.