Spring 2018

ECE 110

Course Notes

Learn It!

Suppose you want to make a pair of electric heated mittens. Into the lining of each mitten, you sew a $9\text{ V}$ battery connected to four $1\text{ k}\Omega$ resistors. This is an example of a circuit: an arrangement of circuit elements (such as sources and resistors) connected using wires (or other conducting material) through which current can flow.

Figure 1

Electric heated mitten
Fig. 1: Electric heated mitten. The battery is represented as a voltage source $V_x$ for simplicity. It is connected to a resistor $R_1$ in the thumb of the mitten and a string of three resistors $R_2$, $R_3$ and $R_4$ in the finger section. We say that $R_2$, $R_3$ and $R_4$ are in series. We also say that $V_x$, $R_1$ and the combination $R_2$-$R_3$-$R_4$ are in parallel.

It works! The resistors warm up your fingertips by converting electrical energy into heat energy. Here the heat energy is not wasted (unlike in a light bulb). To figure out how much energy is converted each second, we first need to determine each element's voltage drop and current.

A circuit schematic is an abstract depiction of the electrical configuration of a circuit, but not necessarily its physical arrangement. One of its purposes is to enable you solve for unknown quantities. For this reason, a circuit schematic is usually drawn with plenty of space for labels and with connections meeting at right angles.

Figure 2

Circuit schematic
Fig. 2: Circuit schematic. The mitten circuit in Fig. 1 is redrawn as a circuit schematic. The schematic does not resemble the physical mitten, but nevertheless represents the same electrical circuit. There is sufficient space in the diagram to label each element with a voltage drop and a current in the standard labeling. Given that $V_x$, $R_1$, $R_2$, $R_3$ and $R_4$ are known, there are 9 unknown voltages and currents in this circuit.

Recall that in the standard labeling the current arrow label points from the $+$ label to the $-$ label of the voltage drop. For voltage and current sources, either the voltage polarity labels or the current arrow label are given in the symbol, so the unmarked labels should be drawn in consistently. A resistor has two possible standard labelings. Either choice is fine, but it is helpful to choose the labeling that makes the voltage drop and current positive quantities (if you can guess which way correctly).

On the rest of this page, you learn the fundamental laws that govern voltage and current in a circuit and how to apply them together with Ohm's law to solve for all voltage drops and currents in the circuit.

A loop is a path around a circuit that starts and ends in the same place.

Figure 3

Circuit loops
Fig. 3: Circuit loops. There are three distinct loops in this circuit. Loop 1 goes through $R_1$ and $V_x$. Loop 2 goes through $V_x$, $R_2$, $R_3$ and $R_4$. Loop 3 goes through $R_1$, $R_2$, $R_3$ and $R_4$, bypassing $V_x$.

Kirchhoff's voltage law (KVL) states that around a loop:
\text{sum of voltage rises} &= \text{sum of voltage drops} \label{KLS-EQV}

Figure 4

Voltage rises and drops
Fig. 4: Voltage rises and drops. Whether a labeled voltage is a rise or a drop depends on how the loop crosses its polarity labels. If the loop enters at the $-$ label and leaves at the $+$ label as in $V_y$, it is a voltage rise. Otherwise, the loop goes from the $+$ label to the $-$ label as in $V_z$, so the voltage is a drop.

Applying KVL around the three loops in Fig. 3 gives the following equations:
V_1 &= V_x & & \text{KVL around loop 1} \label{KLS-LP1} \\
V_x+V_4 &= V_2+V_3 & & \text{KVL around loop 2} \label{KLS-LP2} \\
V_1+V_4 &= V_2+V_3 & & \text{KVL around loop 3} \label{KLS-LP3}
Notice that equation $\eqref{KLS-LP3}$ can be obtained directly from equations $\eqref{KLS-LP1}$ and $\eqref{KLS-LP2}$, so these equations are redundant. It turns out that any two of the equations $\eqref{KLS-LP1}$, $\eqref{KLS-LP2}$ and $\eqref{KLS-LP3}$ are independent.

KVL is true because voltage rises and drops are defined to be gains and losses, respectively, in electric potential energy of a $+1\text{ C}$ charge. Since a loop starts and ends at the same place, the gains and losses around the loop must balance according to the conservation of energy. Therefore, the sum of the voltage rises encountered around the loop equals the sum of the voltage drops around the same loop.

A node is a circuit connection that extends to all its neighboring elements but does not contain them.

Figure 5

Circuit nodes
Fig. 5: Circuit nodes. There are four nodes in this circuit. Node $a$ connects $V_x$, $R_1$ and $R_2$. Node $b$ connects $R_2$ and $R_3$. Node $c$ connects $R_3$ and $R_4$. Node $d$ connects $V_x$, $R_1$ and $R_4$.

Kirchhoff's current law (KCL) states that at a node:
\text{sum of currents in} &= \text{sum of currents out} \label{KLS-EQI}
Applying KCL at the four nodes in Fig. 5 gives the following equations:
0 &= I_x+I_1+I_2 & & \text{KCL at node }a \label{KLS-NDA} \\
I_2 &= I_3 & & \text{KCL at node }b \label{KLS-NDB} \\
I_3+I_4 &= 0 & & \text{KCL at node }c \label{KLS-NDC} \\
I_x+I_1 &= I_4 & & \text{KCL at node }d \label{KLS-NDD}
Notice that adding equations $\eqref{KLS-NDA}$ through $\eqref{KLS-NDD}$ gives the identity
so these equations are redundant. It turns out that any three of the equations $\eqref{KLS-NDA}$ through $\eqref{KLS-NDD}$ are independent.

The reason that KCL holds is that a node cannot store charge because it is just a connection between elements. Along with the fact that charge cannot be created or destroyed, this means that the sum of current entering a node must equal the sum of current exiting that node.

Recall that the circuit from Fig. 2 has 9 unknown voltages and currents since the voltage source and resistor values are given: $V_x=9\text{ V}$ and $R_1=R_2=R_3=R_4=1\text{ k}\Omega$.

KVL provides 2 independent equations (among $\eqref{KLS-LP1}$, $\eqref{KLS-LP2}$ and $\eqref{KLS-LP3}$) and KCL provides 3 independent equations (among $\eqref{KLS-NDA}$ through $\eqref{KLS-NDD}$). Ohm's law applied to each resistor provides 4 more equations:
V_1 &= I_1 R_1 \label{KLS-OL2} \\
V_2 &= I_2 R_2 \label{KLS-OL3} \\
V_3 &= I_3 R_3 \label{KLS-OL4} \\
V_4 &= I_4 R_4 \label{KLS-OL5}
Together there are 9 independent equations (for example, $\eqref{KLS-LP1}$, $\eqref{KLS-LP2}$, $\eqref{KLS-NDA}$, $\eqref{KLS-NDB}$, $\eqref{KLS-NDC}$, $\eqref{KLS-OL2}$, $\eqref{KLS-OL3}$, $\eqref{KLS-OL4}$ and $\eqref{KLS-OL5}$) to solve for all 9 unknown voltages and currents:
& & I_x &= -12\text{ mA} \\
V_1 &= 9\text{ V} & I_1 &= 9\text{ mA}\\
V_2 &= 3\text{ V} & I_2 &= 3\text{ mA}\\
V_3 &= 3\text{ V} & I_3 &= 3\text{ mA}\\
V_4 &= -3\text{ V} & I_4 &= -3\text{ mA}
\end{aligned} \label{KLS-SLN}
The fact that $I_x$, $V_4$ and $I_4$ are negative is not wrong. A negative value of current simply means that positive current actually flows in the direction opposite the arrow label. A negative voltage drop means that the $+$ label is actually at a lower voltage level than the $-$ label.

We now verify the power balance for this circuit. Since all the elements have standard labeling in Fig. 2, their powers can be calculated as $P=VI$ as follows.
P_x &= V_x I_x = -108\text{ mW}\\
P_1 &= V_1 I_1 = 81\text{ mW}\\
P_2 &= V_2 I_2 = 9\text{ mW}\\
P_3 &= V_3 I_3 = 9\text{ mW}\\
P_4 &= V_4 I_4 = 9\text{ mW}
\end{aligned} \label{KLS-SLP}
Notice that the total power of all elements, $P_x+P_1+P_2+P_3+P_4=0\text{ mW}$. The $108\text{ mW}$ of power delivered by the voltage source $V_x$ is balanced exactly by the power absorbed by the four resistors.

You can analyze any circuit of sources and resistors in this way using KVL, KCL and Ohm's law, but the process is tedious. You need to solve many equations simultaneously, while being careful to avoid redundant ones. To reduce the math, you will soon learn more intuitive shortcuts. Later you will also learn a systematic way to apply KVL, KCL and Ohm's law called the node method.

A supernode is like a node that contains sources and/or resistors. Since these elements cannot store charge, KCL holds at supernodes too.

Figure 6

A supernode
Fig. 6: A supernode. This supernode contains voltage source $V_x$ and resistor $R_1$. In fact, it is the combination of nodes $a$ and $d$ in Fig. 5.

Applying KCL at the supernode in Fig. 6 gives:
0 &= I_2+I_4 & & \text{KCL at supernode} \label{KLS-NDS}
Notice that this equation can be obtained directly from equations $\eqref{KLS-NDA}$ and $\eqref{KLS-NDD}$, the KCL equations at nodes $a$ and $d$, respectively. Supernodes are used in the node method.

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