ECE317: Tentative Course Schedule – Spring 2024
Day |
Date |
No. |
Session |
Note
Reading |
HW |
Project |
Slide |
W |
1-17 |
1 |
Introduction, Charge,
Current, Voltage, Power |
1.1-1.2 |
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M |
1-22 |
2 |
Current, Voltage, Power,
Sign Convention, KCL & KVL |
1.3-1.4 |
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W |
1-24 |
3 |
Circuit Elements,
Resistance, Resistive Circuit |
1.4-1.5 |
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M |
1-29 |
4 |
Node Voltage Method, |
2.2-2.3 |
1 |
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W |
1-31 |
5 |
Node Voltage Method,
Loop Current Method |
2.2-2.4 |
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M |
2-5 |
6 |
Equivalent Circuits |
2.4-2.5 |
2 |
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W |
2-7 |
7 |
I-V Characteristics,
Equivalent Circuits |
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M |
2-12 |
8 |
Sinusoidal, AC,
Capacitance, Inductance |
3.1-3.2 |
3 |
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W |
2-14 |
9 |
AC Circuit with Capacitance,
Inductance |
3.2-3.3 |
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M |
2-19 |
10 |
Semiconductor, p-n
Junctions |
4.1-4.2 |
4 |
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W |
2-21 |
11 |
Diode, Diodes Circuit |
4.3 |
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M |
2-26 |
12 |
Review for Exam 1 |
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W |
2-28 |
13 |
Exam
1 (Chapters 1-4 ) |
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M |
3-4 |
14 |
p-n Junctions, Diode, Transistors, IC Fabrication |
5 |
Assignment |
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W |
3-6 |
15 |
Transistors - MOSFET and BJT |
5 |
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M |
3-18 |
16 |
Transistors
Circuit – Amplifier |
6.1 |
5 |
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W |
3-20 |
17 |
Transistors
Circuit – Logic gate |
6.2 |
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M |
3-25 |
18 |
Binary Numbers, Logic Operation, Truth Tables |
6.3-6.4 |
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W |
3-27 |
19 |
Combinational Logic, Example: Digital Adder |
7.1-7.2 |
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Proposal Due |
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M |
4-1 |
20 |
Combinational Logic; Sequential Logic |
7.3-7.6 |
6 |
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W |
4-3 |
21 |
Sequential Logic |
8.1-8.2 |
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M |
4-8 |
22 |
Computer |
10 |
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W |
4-10 |
23 |
Computer |
10 |
7 |
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M |
4-15 |
24 |
Digital Information |
9.1-9.3 |
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W |
4-17 |
25 |
Error Correction, Encryption |
Draft
Due |
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M |
4-22 |
26 |
Review for Exam 2 |
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W |
4-24 |
27 |
Exam 2 (Chapters 4, 5, 6, 7, 8, 10) |
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M |
4-29 |
28 |
Project Presentation |
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Final Due |
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W |
4-31 |
29 |
Project Presentation |
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Project Presentations: TBA
(Updated:
02/04/2024)